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AuthorElserougi A.A.
AuthorMassoud A.
AuthorAhmed S.
Available date2019-09-24T07:47:38Z
Publication Date2018
Publication NameProceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018
Publication Name12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018
ResourceScopus
ISBN9.78E+12
URIhttp://dx.doi.org/10.1109/CPE.2018.8372524
URIhttp://hdl.handle.net/10576/11906
AbstractIn conventional Two-Level Voltage Source Converters (2L-VSCs), connecting between high/medium dc voltage and medium/low ac voltage requires semiconductor devices rated at the high/medium dc-voltage, which negatively affects the converter cost. Alternatively, the Capacitor-Tapped Multi-module VSC (CT-MC) can be used, where it has a good bucking capability. The CT-MC consists of three (or multiple of three) Half-Bridge Inverter (HBI) modules, where the dc terminals of these modules are connected in series across the high/medium dc-link voltage, i.e. semiconductor devices with a lower voltage rating can be employed. The ac outputs of the involved HBIs are integrated to the ac gird through proper transformer(s). In this paper, the performance of the CT-MC is investigated, when Selective Harmonic Elimination (SHE) method is employed for dc-ac conversion to reduce the converter switching losses, while keeping the Total Harmonic Distortion (THD) of the ac currents within the recommended range. Simulation results are Prasented to show the performance of CT-MC when SHE is applied.
Languageen
PublisherInstitute of Electrical and Electronics Engineers Inc.
SubjectCapacitor-tapped
Multi-module
Selective harmonic elimination
TitleInvestigation of three-phase capacitor-tapped multi-module voltage source converter with selective harmonic elimination
TypeConference Paper
Pagination01-May


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