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AuthorFarhat A.A.H.
AuthorAl-Zawqari A.
AuthorHommos O.
AuthorAl-Qahtani A.
AuthorBensaali F.
AuthorAmira A.
AuthorZhai X.
Available date2020-03-18T08:10:06Z
Publication Date2018
Publication Name2017 9th IEEE-GCC Conference and Exhibition, GCCCE 2017
ResourceScopus
URIhttp://dx.doi.org/10.1109/IEEEGCC.2017.8448145
URIhttp://hdl.handle.net/10576/13292
AbstractAutomatic Number Plate Recognition (ANPR) systems have become widely used for safety, security, and commercial purposes. A typical ANPR system is based on three essential stages: Number Plate Localization (NPL), Character Segmentation (CS), and Optical Character Recognition (OCR). Recently, ANPR systems started to use High Definition (HD) cameras to improve the recognition rate of the system. In this paper., a proposed OCR stage for a HD ANPR system is presented. The software implementation of the proposed algorithm was carried on as a proof of concept using MATLAB., followed by its hardware implementation using a heterogeneous System on Chip (SoC) platform. The selected platform is Xilinx Zynq-7000 All Programmable SoC that consists of an ARM processor and a Field Programmable Gate Array (FPGA). The stage was implemented using both processing units separately and it was found that the FPGA is capable of processing one character faster the ARM processor. The hardware implementation results show that the proposed FPGA based OCR stage recognize one character in 0.63 ms, with an accuracy of 99.5%. ? 2017 IEEE.
SponsorACKNOWLEDGMENT This publication was made possible by UREP grant #17-138-2-037 from the Qatar national research fund (a member of
Languageen
PublisherInstitute of Electrical and Electronics Engineers Inc.
SubjectAutomatic Number Plate Recognition Systems
FPGA
High-Level Synthesis
Optical Character Recognition
Vivado
TitleOCR-based hardware implementation for qatari number plate on the Zynq SoC
TypeConference Paper


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