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A neural network algorithm for hardware-software verification
(
IEEE
, 2003 , Conference Paper)
Formal verification is the task of proving that a property holds for a model of a design. This paper examines the idea of a Neural Network-based algorithm used to find the set of states that makes a specification valid. ...
An efficient model checker based on theaxiomatization of Propositional Temporal Logic in rewriting logic
(
IEEE
, 2003 , Conference Paper)
In this paper, we propose an efficient Model Checker for the Propositional Temporal Logic denoted by PTL. This logic is hown to be well suited to verify electronic circuits and reactive systems. A typical verification ...
Towards an electronic voting system for the state of Qatar
(
IEEE
, 2009 , Conference Paper)
In this paper we propose an electronic voting system for the state of Qatar. The system allows Qataris people to vote online from their preferred locations, (homes or offices) without the need to move physically to the ...